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CH proprietary technologies

  1. Advanced clocking
  2. D/A conversion enhancement
  3. Amplifier biasing
  4. Amplifier global vs. local feedback ratio

Philosophy

Digital signal's quality is too often overlooked by simplistic statements such as “It is digital therefore it is perfect”. This is true as long as we stay in the digital domain. But there are two main cases where it is no more true: when a digital-to-analog (D/A) or an analog-to-digital (A/D) conversion takes place and when several digital devices need to be synchronized. In these cases, extreme care must be taken to digital (especially clock) signal's quality, more precisely to their perfect timing (edge shape and time-placement accuracy). This is why CH do not consider clock signals as a digital signals, but rather as highly sensitive analog signals, galvanically isolated from all noisy digital processing and having its own dedicated power supply.

There are several ways to synchronize a digital source and a DAC. Most common ones include analog Phase Locked Loop (PLL), asynchronous Sample Rate Converters (SRC) and First-In First-Out (FIFO) buffers. Each of these technique has its own advantages, but also its own drawbacks. For the CH product line, we have rather chosen the two best techniques available: A novel in-house designed VCXO-based digital PLL and a Wordclock-based source synchronization derived from the professional audio world.

The table below compares these techniques:

 

  Technique description Advantages Drawbacks
Analog PLL - DAC uses a variable local clock with wide frequency range tuning capability
- Its frequency is tracked by a phase locked loop to lock to incoming audio signal
- Good phase alignment between input and output
- Unlocks quite fast
- Source jitter gets imported from input signal (sometimes even amplified)
- Wide bandwidth jitter: typically in the DC to 10 kHz band (most of the audio band)
Asynchronous
SRC
- DAC uses a fixed frequency clock
- Sampling frequency of incoming audio stream is contunuously estimated
- Input to output sampling conversion rate is derived from it
- Upsampling with variable ratio is performed on incoming audio stream
- Good phase alignment between input and output
- Unlocks quite fast
- Source jitter rejection can be decent with advanced designs (expensive DSP based)
- Incoming audio data gets processed (not only are news interpolation point added between existent points, but even existent points gets transformed)
- Not bitperfect makes this technique not suitable for DSD transmission in DoP container (DoP header get altered)
- Source jitter rejection is poor on most low-cost ASRC chips (jitter bandwidth typically in the DC to 100 Hz or even DC to 1 kHz, well in the audio band)
FIFO buffer - Incoming audio stream gets buffered by the DAC
- When large incoming buffer is half full, DAC starts playing
- Buffer eventually gets emptied of filled after a buffersize-dependent time
- Clock can be generated very close to conversion chip (ideal location)
- Conversion Masterclock is running at fixed frequency
- Extremely low jitter (depends on DAC local clock quality only)
- Long playback latency
- Take a long time to unlock and to detect input frequency changes
- Sound can skip when playing long uninterrupted musical piece (FIFO full or empty)
- No phase alignment at all between input and output (can not be used in multi DAC systems)
CH VCXO based
digital PLL
- DAC uses two voltage-controlled crystal oscillators (VCXO), one at 22.5792 MHz (for 44.1 kHz multiple audio) and one at 24.576 MHz (for 48 kHz multiple audio)
- DAC processor compares local clock frequency with incoming audio frequency
- DAC processor fine tracks VCXO frequency below 0.1 Hz, with correction amplitudes of less than 0.1 PPM (<0.0000001%)
- Extremely low jitter in the 10 Hz to 25 MHz frequency band
- Very-low frequency jitter performances can even be improved by the use of extremely stable external clock
- Very small input to output audio signal phase difference (< 2.5 us)
- Highly versatile (multi-C1 DAC synchronization possible)
- Very fast unlock
- Can take a few seconds to lock phase (frequency locking is very fast)

CH Wordclock
synchonization

- System clock is generated in DAC (DAC is clock master)
- Wordclock signal is sent from DAC to source (BNC cable)
- Source uses this clock to synchronize its internal VCXO (source is clock slave)
- Clock is generated very close to conversion chip (ideal location)
- Conversion Masterclock is running at fixed frequency and master of the system
- Extremely low jitter (depends on DAC local clock quality only)
- Input to output audio signal phase difference < 2.5 us
- Source needs a clock in capability (SYNC_IO optional board in D1)
- DAC needs a clock out capability (SYNC_IO optional board in C1)

 

Recommended setup

Many clocking schemes can be used with CH Precision's products. Even though this is quite technical, we highly recommend that you refer to the following use cases in order to get the best sound out of your CH system.

Use case 1: C1 D/A controller (no SYNC_IO board) + digital audio source with no BNC input capability (e.g. D1 SACD/CD drive with no SYNC_IO board)
  • Audio cable: CH-LINK from CH source (e.g. D1) to C1, or standard digital link (AES-EBU, Coaxial or TOSLINK) from other source to C1
  • C1 clock source: AUDIO IN (for this input)
  • D1 clock source: INTERNAL
Use case 2: C1 D/A controller with SYNC_IO board + D1 SACD/CD drive with SYNC_IO board
  • Audio cable: CH-LINK from D1 to C1
  • Clock cable: 75 Ohm BNC from C1 SYNC_IO BNC 75 Ohm  output (1 or 2) to D1 SYNC_IO BNC 75 Ohm / Hi-Z input
  • C1 clock source: INTERNAL (for CH-LINK input)
  • D1 clock source: SYNCHRO BNC 75 Ohm
Use case 3: C1 D/A controller with SYNC_IO board + D1 SACD/CD drive with SYNC_IO board + highly stable Master Clock
  • Audio cable: CH-LINK D1 to C1
  • Clock cables: 75 Ohm BNC from Master Clock to C1 SYNC_IO BNC 75 Ohm / Hi-Z input, and 75 Ohm BNC from Master Clock to D1 SYNC_IO BNC 75 Ohm / Hi-Z input
  • C1 clock source: SYNCHRO BNC 75 Ohm (for CH-LINK input)
  • D1 clock source: SYNCHRO BNC 75 Ohm
Use case 4: C1 D/A controller with USB_IN board + Computer
  • Data cable: USB cable from Computer (USB type-A) to C1 USB_IN (USB type-B)
  • C1 clock source: INTERNAL (for USB input)
Use case 5: C1 D/A controller with NETWORK board + Computer in a network
  • Data cable: RJ-45 (Ethernet) from Router to C1 ETHERNET (on NETWORK board)
  • C1 clock source: INTERNAL (for Streaming input)

 

Typical phase noise

Following graph shows the typical phase noise of CH Precision's VCXO based digital PLL.

VCXO

The digital signal processing chain in the C1 is completed by a proprietary signal conditioning stage which optimizes the signal for conversion by numerous R-2R converters per channel.
Because each converter has a slightly different gain and offset, an automated calibration system harmonizes their operation.
In addition, in order to address low level linearity issues inherent to R-2R converters, a unique scrambling technology is applied. By sending slightly different signals to each converter through the addition of an algorithmically generated, low-level, random high-frequency noise (which is canceled out in the analog domain), the low level linearity is significantly improved.

Biasing an amplifier is a method of establishing proper operating conditions inside the amplifier output stage.
It must remain constant, no matter how hard and hot the amplifier is run. A temperature variation (ambient temperature or amount of power that is supplied to the loudspeaker) will modify the characteristics of the amplifier circuit. In order to achieve an unconditionally steady bias, CH Precision developed a patent pending electronic system (the ExactBias circuit) that automatically and linearly regulates the bias of the amplifier by monitoring in real-time the temperature right inside the power transistors and act accordingly.
This ExactBias circuit is used in all CH amplifiers.

CH Precision provides its amplifiers with the ability to modify the ratio between their local and global feedback.
This in essence provides a way to control the amplifier damping factor (the quotient of the load impedance and the amplifier output impedance), allowing to fine-tune the amplifier with the connected loudspeakers. For loudspeakers where each drivers can be driven separately, finer tuning can be achieved as the feedback ratio can be independently adjusted on each driver.
All CH amplifiers provide an adjustable global versus local feedback ratio, from full local to full global, in 10% (or 20%) adjustment steps.